
CIF Peripheral Model - SimpleTimer
CoMET Version 5.9 – Tutorial 115
VSP and SimpleTimer Block Diagram
The SimpleVSP project with an instance of SimpleTimer added
Changes from the original SimpleVSP project are shown in blue.
rm926ejs1
Irq
Clock
InstBus
DataBus DataBusClock
InstBusClock
GenericMemory1
Reset
BusClock
Bus
astGpStdLogic01
astGpReset1
Reset
astGpClock1
Clock
ClockNet
ResetNet
irtual System Prototype - SimpleVSP1
irtual Platform - VirtualPlatform1
StdLogic0Net
StdBus1
Bus
SignalOut BusClockIn
StdBus1Net
StdBus1ClockNet
PlatformClock
PlatformReset
Fiq
Reset
SimpleTimer1
Bus
Reset
MatchInterrupt2
MatchInterrupt1
TimerClock
IrqNet
BusClock
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